ISQED
2005
IEEE
14 years 5 months ago
2005
IEEE
This paper discusses clock skew due to manufacturing variability and environmental change. In clock tree design, transition time constraint is an important design parameter that c...
ISQED
2005
IEEE
14 years 5 months ago
2005
IEEE
With continued aggressive process scaling in the subwavelength lithographic regime, resolution enhancement techniques (RETs) such as optical proximity correction (OPC) are an inte...
ISQED
2005
IEEE
14 years 5 months ago
2005
IEEE
Leakage power has become one of the most critical design concerns for the system-level chip designer. Multi-threshold techniques have been used to reduce runtime leakage power wit...
ISQED
2005
IEEE
14 years 5 months ago
2005
IEEE
ISQED
2005
IEEE
14 years 5 months ago
2005
IEEE
Today's System-on-a-Chip (SoC) design methodology provides an efficient way to develop highly integrated systems on a single chip by utilizing pre-designed intellectual prope...