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ISQED
2005
IEEE
95views Hardware» more  ISQED 2005»
14 years 5 months ago
Simulating and Improving Microelectronic Device Reliability by Scaling Voltage and Temperature
The purpose of this work is to explore how device operation parameters such as switching speed and power dissipation scale with voltage and temperature. We simulated a CMOS ring o...
Xiaojun Li, Joerg D. Walter, Joseph B. Bernstein
ISQED
2005
IEEE
106views Hardware» more  ISQED 2005»
14 years 5 months ago
Deep Submicron CMOS Integrated Circuit Reliability Simulation with SPICE
The purpose of the paper is to introduce a new failure rate-based methodology for reliability simulation of deep submicron CMOS integrated circuits. Firstly, two of the state-of-t...
Xiaojun Li, Bing Huang, J. Qin, X. Zhang, Michael ...
ISQED
2005
IEEE
95views Hardware» more  ISQED 2005»
14 years 5 months ago
Power Supply Noise-Aware Scheduling and Allocation for DSP Synthesis
As technology scales down, power supply noise is becoming a performance and reliability bottleneck in modern VLSI. We propose a power supply noise-aware design methodology for hig...
Dongku Kang, Yiran Chen, Kaushik Roy
ISQED
2005
IEEE
169views Hardware» more  ISQED 2005»
14 years 5 months ago
ASLIC: A Low Power CMOS Analog Circuit Design Automation
This paper proposes an efficient automation platform that provides fast and reliable path to analog circuit design for desired specifications. Circuit heuristics and hierarchy a...
Jihyun Lee, Yong-Bin Kim
ISQED
2005
IEEE
76views Hardware» more  ISQED 2005»
14 years 5 months ago
Reticle Floorplanning and Wafer Dicing for Multiple Project Wafers
Multi-project wafer having several chips placed on the same reticle to lower mask cost is key to low-volume IC fabrication. In this paper1 , we proposed two MILP models for simult...
Meng-Chiou Wu, Rung-Bin Lin
ISQED
2005
IEEE
68views Hardware» more  ISQED 2005»
14 years 5 months ago
Modeling Within-Die Spatial Correlation Effects for Process-Design Co-Optimization
Paul Friedberg, Yu Cao, Jason Cain, Ruth Wang, Jan...
ISQED
2005
IEEE
106views Hardware» more  ISQED 2005»
14 years 5 months ago
Thermal-Aware Floorplanning Using Genetic Algorithms
In this work, we present a genetic algorithm based thermal-aware floorplanning framework that aims at reducing hot spots and distributing temperature evenly across a chip while op...
Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, C...
ISQED
2005
IEEE
76views Hardware» more  ISQED 2005»
14 years 5 months ago
Technology Mapping for Reliability Enhancement in Logic Synthesis
Abstract— Reliability enhancements are traditionally implemented through redundancies at the system level or through the use of harden-cell-designs at the circuit level. Reliabil...
Zhaojun Wo, Israel Koren
ISQED
2005
IEEE
99views Hardware» more  ISQED 2005»
14 years 5 months ago
Design Considerations for Low-Power Ultra Wideband Receivers
Abstract - This paper studies design considerations for lowpower ultra wideband (UWB) receiver architectures. First, three different architectures for the impulse-radio UWB transce...
Payam Heydari
ISQED
2005
IEEE
140views Hardware» more  ISQED 2005»
14 years 5 months ago
Toward Quality EDA Tools and Tool Flows Through High-Performance Computing
As the scale and complexity of VLSI circuits increase, Electronic Design Automation (EDA) tools become much more sophisticated and are held to increasing standards of quality. New...
Aaron N. Ng, Igor L. Markov