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ASPDAC
2008
ACM
92views Hardware» more  ASPDAC 2008»
14 years 2 months ago
Decomposition based approach for synthesis of multi-level threshold logic circuits
Scaling is currently the most popular technique used to improve performance metrics of CMOS circuits. This cannot go on forever because the properties that are responsible for the ...
Tejaswi Gowda, Sarma B. K. Vrudhula
DATE
2004
IEEE
123views Hardware» more  DATE 2004»
14 years 4 months ago
Synthesis and Optimization of Threshold Logic Networks with Application to Nanotechnologies
We propose an algorithm for efficient threshold network synthesis of arbitrary multi-output Boolean functions. The main purpose of this work is to bridge the wide gap that currentl...
Rui Zhang, Pallav Gupta, Lin Zhong, Niraj K. Jha
ISCAS
2002
IEEE
88views Hardware» more  ISCAS 2002»
14 years 5 months ago
Low depth carry lookahead addition using charge recycling threshold logic
The main result of this paper is the development of a low depth carry lookahead addition technique based on threshold logic. Two such adders are designed using the recently propos...
Peter Celinski, Said F. Al-Sarawi, Derek Abbott, J...
PATMOS
2004
Springer
14 years 5 months ago
Delay Evaluation of High Speed Data-Path Circuits Based on Threshold Logic
The main result is the development, and delay comparison based on Logical Effort, of a number of high speed circuits for common arithmetic and related operations using threshold l...
Peter Celinski, Derek Abbott, Sorin Cotofana
FPGA
2004
ACM
117views FPGA» more  FPGA 2004»
14 years 5 months ago
A magnetoelectronic macrocell employing reconfigurable threshold logic
In this paper, we introduce a reconfigurable fabric based around a new class of circuit element: the hybrid Hall effect (HHE) magnetoelectronic device. Because they incorporate a ...
Steve Ferrera, Nicholas P. Carter
GLVLSI
2007
IEEE
171views VLSI» more  GLVLSI 2007»
14 years 6 months ago
Combinational equivalence checking for threshold logic circuits
Threshold logic is gaining prominence as an alternative to Boolean logic. The main reason for this trend is the availability of devices that implement these circuits efficiently (...
Tejaswi Gowda, Sarma B. K. Vrudhula, Goran Konjevo...
GLVLSI
2008
IEEE
120views VLSI» more  GLVLSI 2008»
14 years 7 months ago
SAT-based equivalence checking of threshold logic designs for nanotechnologies
Novel nano-scale devices have shown promising potential to overcome physical barriers faced by complementary metaloxide semiconductor (CMOS) technology in future circuit design. H...
Yexin Zheng, Michael S. Hsiao, Chao Huang