ASPDAC
2004
ACM
14 years 6 months ago
2004
ACM
— This paper presents a SAT-based ATPG tool targeting on a path-oriented transition fault model. Under this fault model, a transition fault is detected through the longest sensit...
VTS
2005
IEEE
14 years 6 months ago
2005
IEEE
TARO test patterns are transition fault test patterns that sensitize each transition fault to all of the outputs that can be reached from the fault location. We were not able to i...
ASPDAC
2009
ACM
14 years 7 months ago
2009
ACM
Low power circuits have become a necessary part in modern designs. Retention flip-flop is one of the most important components in low power designs. Conventional test methodologie...
DATE
2009
IEEE
14 years 7 months ago
2009
IEEE
The single stuck-at fault coverage is often seen as a figure-of-merit also for scan testing according to other fault models like transition faults, bridging faults, crosstalk faul...