Sciweavers

DAC
2008
ACM
16 years 7 months ago
A power and temperature aware DRAM architecture
Technological advances enable modern processors to utilize increasingly larger DRAMs with rising access frequencies. This is leading to high power consumption and operating temper...
Song Liu, Seda Ogrenci Memik, Yu Zhang, Gokhan Mem...
DAC
2008
ACM
16 years 7 months ago
Automatic synthesis of clock gating logic with controlled netlist perturbation
Clock gating is the insertion of combinational logic along the clock path to prevent the unnecessary switching of registers and reduce dynamic power consumption. The conditions un...
Aaron P. Hurst
DAC
2008
ACM
16 years 7 months ago
Characterizing chip-multiprocessor variability-tolerance
Spatially-correlated intra-die process variations result in significant core-to-core frequency variations in chip-multiprocessors. An analytical model for frequency island chip-mu...
Sebastian Herbert, Diana Marculescu
DAC
2008
ACM
16 years 7 months ago
The design of a low power carbon nanotube chemical sensor system
This paper presents a hybrid CNT/CMOS chemical sensor system that comprises of a carbon nanotube sensor array and a CMOS interface chip. The full system, including the sensor, con...
Taeg Sang Cho, Kyeong-jae Lee, Jing Kong, Anantha ...
DAC
2008
ACM
16 years 7 months ago
Bounded-lifetime integrated circuits
Integrated circuits with bounded lifetimes can have many business advantages. We give some simple examples of m ods to enforce tunable expiration dates for chips using nanom reliab...
Puneet Gupta, Andrew B. Kahng
148
Voted
DAC
2008
ACM
16 years 7 months ago
Federation: repurposing scalar cores for out-of-order instruction issue
Future SoCs will contain multiple cores. For workloads with significant parallelism, prior work has shown the benefit of many small, multi-threaded, scalar cores. For workloads th...
David Tarjan, Michael Boyer, Kevin Skadron
DAC
2008
ACM
16 years 7 months ago
Path smoothing via discrete optimization
A fundamental problem in timing-driven physical synthesis is the reduction of critical paths in a design. In this work, we propose a powerful new technique that moves (and can als...
Michael D. Moffitt, David A. Papa, Zhuo Li, Charle...
DAC
2008
ACM
16 years 7 months ago
ADAM: run-time agent-based distributed application mapping for on-chip communication
Design-time decisions can often only cover certain scenarios and fail in efficiency when hard-to-predict system scenarios occur. This drives the development of run-time adaptive s...
Jörg Henkel, Mohammad Abdullah Al Faruque, Ru...
DAC
2008
ACM
16 years 7 months ago
Multiprocessor performance estimation using hybrid simulation
With the growing number of programmable processing elements in today's MultiProcessor System-on-Chip (MPSoC) designs, the synergy required for the development of the hardware...
Lei Gao, Kingshuk Karuri, Stefan Kraemer, Rainer L...
DAC
2008
ACM
16 years 7 months ago
Topological routing to maximize routability for package substrate
Compared with on-chip routers, the existing commercial tools for off-chip routing have a much lower routability and often result in a large number of unrouted nets for manual rout...
Shenghua Liu, Guoqiang Chen, Tom Tong Jing, Lei He...