183
Voted
DAC
2008
ACM
16 years 7 months ago
2008
ACM
The threshold voltage (Vth) of a nanoscale transistor is severely affected by random dopant fluctuations and line-edge roughness. The analysis of these effects usually requires at...
147
Voted
DAC
2008
ACM
16 years 7 months ago
2008
ACM
Pattern matching relies on deterministic finite automata (DFA) to search for predefined patterns. While a bit-DFA method is recently proposed to exploit the parallelism in pattern...
163
click to vote
DAC
2008
ACM
16 years 7 months ago
2008
ACM
This paper discusses the use of networks-on-chip (NoCs) consisting of multiple voltage-frequency islands to cope with power consumption, clock distribution and parameter variation...
174
Voted
DAC
2008
ACM
16 years 7 months ago
2008
ACM
C++ based verification methodologies are now emerging as the preferred method for SOC design. However most of the verification involving the C++ models are simulation based. The c...
189
click to vote
DAC
2008
ACM
16 years 7 months ago
2008
ACM
The computer industry has a problem. As Moore's law marches on, we will be exploiting it to double cores, not frequencies. But all those cores ... 2 to 4 today growing to 8, ...
135
click to vote
DAC
2008
ACM
16 years 7 months ago
2008
ACM
A low power passive equalizer using RL terminator is proposed and optimized in this work. The equalizer includes an inductor in series with the resistive terminator, which boosts ...
156
click to vote
DAC
2008
ACM
16 years 7 months ago
2008
ACM
Scenario-based design exploits the time-varying execution behavior of applications by dynamically adapting the system on which they run. This is a particularly interesting design ...
153
click to vote
DAC
2008
ACM
16 years 7 months ago
2008
ACM
In deep submicron circuits, thermal hot spots and high temperature gradients increase the cooling costs, and degrade reliability and performance. In this paper, we propose a low-co...
139
click to vote
DAC
2008
ACM
16 years 7 months ago
2008
ACM
FPGA application developers often attempt to use pipelining, Cslowing and retiming to improve the performance of their designs. Unfortunately, such registered netlists present a f...
151
click to vote
DAC
2008
ACM
16 years 7 months ago
2008
ACM
This paper presents a RTR FPGA embedded in a System on Chip fabricated in 130nm CMOS process. Various aspects of the design flow, from automation to floor-planning are discussed. ...