Sciweavers

DAC
2009
ACM
16 years 7 months ago
A real-time program trace compressor utilizing double move-to-front method
This paper introduces a new unobtrusive and cost-effective method for the capture and compression of program execution traces in real-time, which is based on a double move-to-fron...
Vladimir Uzelac, Aleksandar Milenkovic
DAC
2009
ACM
16 years 7 months ago
Optimal static WCET-aware scratchpad allocation of program code
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access will result in a definite cache hit or miss. This unpredictabilit...
Heiko Falk, Jan C. Kleinsorge
DAC
2009
ACM
16 years 7 months ago
WCET-aware register allocation based on graph coloring
Current compilers lack precise timing models guiding their built-in optimizations. Hence, compilers apply ad-hoc heuristics during optimization to improve code quality. One of the...
Heiko Falk
DAC
2009
ACM
16 years 7 months ago
Fault models for embedded-DRAM macros
In this paper, we compare embedded-DRAM (eDRAM) testing to both SRAM testing and commodity-DRAM testing, since an eDRAM macro uses DRAM cells with an SRAM interface. We first star...
Ching-Yu Chin, Hao-Yu Yang, Mango Chia-Tso Chao, R...
DAC
2009
ACM
16 years 7 months ago
On systematic illegal state identification for pseudo-functional testing
The discrepancy between integrated circuits' activities in normal functional mode and that in structural test mode has an increasing adverse impact on the effectiveness of ma...
Feng Yuan, Qiang Xu
DAC
2009
ACM
16 years 7 months ago
Process variation characterization of chip-level multiprocessors
Within-die variation in leakage power consumption is substantial and increasing for chip-level multiprocessors (CMPs) and multiprocessor systems-on-chip. Dealing with this problem...
Lide Zhang, Lan S. Bai, Robert P. Dick, Li Shang, ...
176
Voted
DAC
2009
ACM
16 years 7 months ago
PDRAM:a hybrid PRAM and DRAM main memory system
In this paper, we propose PDRAM, a novel energy efficient main memory architecture based on phase change random access memory (PRAM) and DRAM. The paper explores the challenges in...
Gaurav Dhiman, Raid Ayoub, Tajana Rosing
DAC
2009
ACM
16 years 7 months ago
Enabling adaptability through elastic clocks
Power and performance benefits of scaling are lost to worst case margins as uncertainty of device characteristics is increasing. Adaptive techniques can dynamically adjust the mar...
Emre Tuncer, Jordi Cortadella, Luciano Lavagno
DAC
2009
ACM
16 years 7 months ago
Way Stealing:cache-assisted automatic instruction set extensions
This paper introduces Way Stealing, a simple architectural modification to a cache-based processor to increase data bandwidth to and from application-specific Instruction Set Exte...
Theo Kluter, Philip Brisk, Paolo Ienne, Edoardo Ch...
177
Voted
DAC
2009
ACM
16 years 7 months ago
Designing heterogeneous ECU networks via compact architecture encoding and hybrid timing analysis
In this paper, a design method for automotive architectures is proposed. The two main technical contributions are (i) a novel hardware/software architecture encoding that unifies ...
Jürgen Teich, Martin Lukasiewycz, Michael Gla...