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171
Voted
DAC
2004
ACM
15 years 7 months ago
A methodology to improve timing yield in the presence of process variations
The ability to control the variations in IC fabrication process is rapidly diminishing as feature sizes continue towards the sub-100 nm regime. As a result, there is an increasing...
Sreeja Raj, Sarma B. K. Vrudhula, Janet Meiling Wa...
170
Voted
DAC
2004
ACM
16 years 4 months ago
A new heuristic algorithm for reversible logic synthesis
Reversible logic has applications in many fields, including quantum computing. Synthesis techniques for reversible circuits are not well developed, even for functions with a small...
Pawel Kerntopf
169
Voted
DAC
2004
ACM
16 years 4 months ago
Off-chip latency-driven dynamic voltage and frequency scaling for an MPEG decoding
This paper describes a dynamic voltage and frequency scaling (DVFS) technique for MPEG decoding to reduce the energy consumption using the computational workload decomposition. Th...
Kihwan Choi, Ramakrishna Soma, Massoud Pedram
163
Voted
DAC
2004
ACM
16 years 4 months ago
A SAT-based algorithm for reparameterization in symbolic simulation
Parametric representations used for symbolic simulation of circuits usually use BDDs. After a few steps of symbolic simulation, state set representation is converted from one para...
Pankaj Chauhan, Edmund M. Clarke, Daniel Kroening
163
Voted
DAC
2004
ACM
16 years 4 months ago
Fast statistical timing analysis handling arbitrary delay correlations
CT An efficient statistical timing analysis algorithm that can handle arbitrary (spatial and structural) causes of delay correlation is described. The algorithm derives the entire ...
Michael Orshansky, Arnab Bandyopadhyay
Computer Architecture
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