110 search results - page 1 / 22 » A Highly-Configurable Cache Architecture for Embedded System... |
ISCA
2003
IEEE
14 years 4 months ago
2003
IEEE
ISSS
2002
IEEE
14 years 3 months ago
2002
IEEE
Adding a small loop cache to a microprocessor has been shown to reduce average instruction fetch energy for various sets of embedded system applications. With the advent of core-b...
DAC
2003
ACM
14 years 4 months ago
2003
ACM
The increasing use of microprocessor cores in embedded systems as well as mobile and portable devices creates an opportunity for customizing the cache subsystem for improved perfo...
SEUS
2009
IEEE
14 years 5 months ago
2009
IEEE
Future embedded systems are expected to use chip-multiprocessors to provide the execution power for increasingly demanding applications. Multiprocessors increase the pressure on th...
DAC
1999
ACM
14 years 12 months ago
1999
ACM
In embedded system design, the designer has to choose an onchip memory configuration that is suitable for a specific application. To aid in this design choice, we present a memory...