945 search results - page 8 / 189 » A New Method for Design of Robust Digital Circuits |
ICCAD
2001
IEEE
14 years 4 months ago
2001
IEEE
This paper presents the sizing rules method for analog CMOS circuit design that consists of: first, the development of a hierarchical library of transistor pair groups as basic b...
DAC
2006
ACM
14 years 1 months ago
2006
ACM
Microfluidics-based biochips, also referred to as lab-on-a-chip (LoC), are devices that integrate fluid-handling functions such as sample preparation, analysis, separation, and de...
DAC
1996
ACM
13 years 11 months ago
1996
ACM
The development of new Field-Programmed, MaskProgrammed and Laser-Programmed Gate Array architectures is hampered by the lack of realistic test circuits that exercise both the arc...
DATE
2000
IEEE
14 years 2 days ago
2000
IEEE
Simulation is still one of the most important subtasks when designing a VLSI circuit. However, more and more elements on a chip increase simulation runtimes. Especially on transis...
ICCAD
2008
IEEE
14 years 2 months ago
2008
IEEE
This paper presents ISCLEs, a novel and robust analog design method that promises to scale with Moore’s Law, by doing boosting-style importance sampling on digital-sized circuit...