522 search results - page 59 / 105 » A Note on Designing Logical Circuits Using SAT |
ICCAD
1999
IEEE
14 years 11 days ago
1999
IEEE
This paper describes a method of synthesis of asynchronous circuits with relative timing. Asynchronous communication between gates and modules typically utilizes handshakes to ens...
DAC
2002
ACM
14 years 9 months ago
2002
ACM
We have developed a generic integer linear programming(ILP)based engineering change(EC) methodology. The EC methodology has three components: enabling, fast, and preserving. Enabl...
FPGA
2008
ACM
13 years 9 months ago
2008
ACM
Current advances in chip design and manufacturing have allowed IC manufacturing to approach the nanometer range. As the feature size scales down, greater variability is experience...
VLSID
2006
IEEE
14 years 8 months ago
2006
IEEE
Radiation induced soft errors in combinational logic is expected to become as important as directly induced errors on state elements. Consequently, it has become important to deve...
VLSID
2002
IEEE
14 years 8 months ago
2002
IEEE
Power gating is emerging as a viable solution to reduction of leakage current. However, power gated circuits are different from the conventional designs in the sense that a power-...