Sciweavers

95 search results - page 3 / 19
» A Novel Functional Test Generation Method for Processors Usi...
Sort
View
ASPDAC
2005
ACM
107views Hardware» more  ASPDAC 2005»
13 years 10 months ago
Constraint extraction for pseudo-functional scan-based delay testing
Recent research results have shown that the traditional structural testing for delay and crosstalk faults may result in over-testing due to the non-trivial number of such faults t...
Yung-Chieh Lin, Feng Lu, Kai Yang, Kwang-Ting Chen...
TC
1998
13 years 7 months ago
Abstraction Techniques for Validation Coverage Analysis and Test Generation
ion Techniques for Validation Coverage Analysis and Test Generation Dinos Moundanos, Jacob A. Abraham, Fellow, IEEE, and Yatin V. Hoskote —The enormous state spaces which must be...
Dinos Moundanos, Jacob A. Abraham, Yatin Vasant Ho...
ICCAD
1999
IEEE
148views Hardware» more  ICCAD 1999»
14 years 6 days ago
SAT based ATPG using fast justification and propagation in the implication graph
In this paper we present new methods for fast justification and propagation in the implication graph (IG) which is the core data structure of our SAT based implication engine. As ...
Paul Tafertshofer, Andreas Ganz
ISQED
2002
IEEE
203views Hardware» more  ISQED 2002»
14 years 25 days ago
Automatic Test Program Generation from RT-Level Microprocessor Descriptions
The paper addresses the issue of microprocessor and microcontroller testing, and follows an approach based on the generation of a test program. The proposed method relies on two p...
Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda...
DFT
2006
IEEE
203views VLSI» more  DFT 2006»
14 years 1 months ago
Self Testing SoC with Reduced Memory Requirements and Minimized Hardware Overhead
This paper describes a methodology of creating a built-in diagnostic system of a System on Chip and experimental results of the system application on the AT94K FPSLIC with cores d...
Ondrej Novák, Zdenek Plíva, Jiri Jen...