1257 search results - page 25 / 252 » A Novel Sequencer Hardware for Application Specific Computin... |
158
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CGF
2004
15 years 5 months ago
2004
This paper presents an efficient hardware-accelerated method for novel view synthesis from a set of images or videos. Our method is based on the photo hull representation, which i...
137
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VLSID
2002
IEEE
16 years 6 months ago
2002
IEEE
This paper presents the Smith and Waterman Algorithm-Specific ASIC Design (SWASAD) project. This is a hardware solution that implements the S&W algorithm.. The SWASAD is an imp...
160
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IEEEPACT
2009
IEEE
15 years 3 months ago
2009
IEEE
Efficiently using the hardware capabilities of the Cell processor, a heterogeneous chip multiprocessor that uses several levels of parallelism to deliver high performance, and bei...
173
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DATE
2010
IEEE
15 years 11 months ago
2010
IEEE
—In order to solve the challenges in processor design for the next generation wireless communication systems, this paper first proposes a system level design flow for communicati...
144
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ICCAD
2002
IEEE
16 years 2 months ago
2002
IEEE
In macromodeling-based power estimation, circuit macromodels are created from simulations of synthetic input vector sequences. Fast generation of these sequences with all possible...