204 search results - page 4 / 41 » A Pipelined Memory Architecture for High Throughput Network ... |
HPCA
1996
IEEE
13 years 11 months ago
1996
IEEE
Exploiting instruction-level parallelism (ILP) is extremely important for achieving high performance in application specific instruction set processors (ASIPs) and embedded process...
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
Current day network processors incorporate several architectural features including symmetric multi-processing (SMP), block multi-threading, and multiple memory elements to suppor...
FCCM
2008
IEEE
14 years 1 months ago
2008
IEEE
Internet Protocol (IP) lookup in routers can be implemented by some form of tree traversal. Pipelining can dramatically improve the search throughput. However, it results in unbal...
DAC
2002
ACM
14 years 8 months ago
2002
ACM
Profiling an application executing on a microprocessor is part of the solution to numerous software and hardware optimization and design automation problems. Most current profilin...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
: - One of the main bottlenecks when designing a network processing system is very often its memory subsystem. This is mainly due to the state-of-the-art network links operating at...