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» A RISC Hardware Platform for Low Power Java
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FPL
2003
Springer
120views Hardware» more  FPL 2003»
14 years 1 months ago
Power-Efficient Implementations of Multimedia Applications on Reconfigurable Platforms
The power-efficient implementation of motion estimation algorithms on a system comprised by an FPGA and an external memory is presented. Low power consumption is achieved by implem...
Konstantinos Tatas, K. Siozios, Dimitrios Soudris,...
ISQED
2005
IEEE
169views Hardware» more  ISQED 2005»
14 years 1 months ago
ASLIC: A Low Power CMOS Analog Circuit Design Automation
This paper proposes an efficient automation platform that provides fast and reliable path to analog circuit design for desired specifications. Circuit heuristics and hierarchy a...
Jihyun Lee, Yong-Bin Kim
ISCAS
2007
IEEE
136views Hardware» more  ISCAS 2007»
14 years 2 months ago
Flexible Low Power Probability Density Estimation Unit For Speech Recognition
— This paper describes the hardware architecture for a flexible probability density estimation unit to be used in a Large Vocabulary Speech Recognition System, and targeted for m...
Ullas Pazhayaveetil, Dhruba Chandra, Paul Franzon
DATE
2002
IEEE
115views Hardware» more  DATE 2002»
14 years 24 days ago
Design Technology for Networked Reconfigurable FPGA Platforms
Future networked appliances should be able to download new services or upgrades from the network and execute them locally. This flexibility is typically achieved by processors tha...
Steve Guccione, Diederik Verkest, Ivo Bolsens
DATE
2010
IEEE
134views Hardware» more  DATE 2010»
14 years 28 days ago
Constrained Power Management: Application to a multimedia mobile platform
—In this paper we provide an overview of CPM, a cross-layer framework for Constrained Power Management, and we present its application on a real use case. This framework involves...
Patrick Bellasi, Stefano Bosisio, Matteo Carnevali...