1234 search results - page 87 / 247 » A Scheduling and Pipelining Algorithm for Hardware Software ... |
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
The model-based methodology has proven to be effective for fast and low-cost development of embedded software. In the model-based development process, transforming a software stru...
ICCAD
2003
IEEE
14 years 4 months ago
2003
IEEE
Transmitting compressed data can reduce inter-processor communication traffic and create new opportunities for DVS (dynamic voltage scaling) in distributed embedded systems. Howe...
DATE
2002
IEEE
14 years 29 days ago
2002
IEEE
: A new technique is presented in this paper to improve the efficiency of data scheduling for multi-context reconfigurable architectures targeting multimedia and DSP applications. ...
CASES
2004
ACM
14 years 1 months ago
2004
ACM
A coarse-grain multithreaded processor can effectively hide long memory latencies by quickly switching to an alternate task when the active task issues a memory request, improving...
DAC
2005
ACM
14 years 9 months ago
2005
ACM
This paper presents two novel and high performance hardware architectures, implemented in FPGA technology, for the KASUMI block cipher; this algorithm lies at the core of the conf...