132 search results - page 5 / 27 » A Self-Tuning Configurable Cache |
FPL
2007
Springer
14 years 26 days ago
2007
Springer
The effect of kernel operations on cache optimisations in a soft-core reconfigurable system is important for dynamic cache switching design. Considering kernel operations changes ...
DAC
1999
ACM
14 years 7 months ago
1999
ACM
In embedded system design, the designer has to choose an onchip memory configuration that is suitable for a specific application. To aid in this design choice, we present a memory...
DATE
2010
IEEE
13 years 11 months ago
2010
IEEE
Abstract— The optimal size of a large on-chip cache can be different for different programs: at some point, the reduction of cache misses achieved when increasing cache size hits...
ISCA
2010
IEEE
13 years 5 months ago
2010
IEEE
Practical cache replacement policies attempt to emulate optimal replacement by predicting the re-reference interval of a cache block. The commonly used LRU replacement policy alwa...
DATE
2004
IEEE
13 years 10 months ago
2004
IEEE
The power consumed by the memory hierarchy of a microprocessor can contribute to as much as 50% of the total microprocessor system power, and is thus a good candidate for optimiza...