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» A design platform for 90-nm leakage reduction techniques
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CASES
2007
ACM
13 years 11 months ago
Cache leakage control mechanism for hard real-time systems
Leakage energy consumption is an increasingly important issue as the technology continues to shrink. Since on-chip caches constitute a major portion of the processor's transi...
Jaw-Wei Chi, Chia-Lin Yang, Yi-Jung Chen, Jian-Jia...
ICCD
2007
IEEE
182views Hardware» more  ICCD 2007»
14 years 2 months ago
Reducing leakage power in peripheral circuits of L2 caches
Leakage power has grown significantly and is a major challenge in microprocessor design. Leakage is the dominant power component in second-level (L2) caches. This paper presents t...
Houman Homayoun, Alexander V. Veidenbaum
DAC
2006
ACM
14 years 8 months ago
Leakage power reduction of embedded memories on FPGAs through location assignment
Transistor leakage is poised to become the dominant source of power dissipation in digital systems, and reconfigurable devices are not immune to this problem. Modern FPGAs already...
Yan Meng, Timothy Sherwood, Ryan Kastner
ISLPED
2007
ACM
97views Hardware» more  ISLPED 2007»
13 years 9 months ago
Detailed placement for leakage reduction using systematic through-pitch variation
We present a novel detailed placement technique that accounts for systematic through-pitch variations to reduce leakage. Leakage depends nearly exponentially on linewidth (gate le...
Andrew B. Kahng, Swamy Muddu, Puneet Sharma
DAC
2004
ACM
14 years 8 months ago
Selective gate-length biasing for cost-effective runtime leakage control
With process scaling, leakage power reduction has become one of the most important design concerns. Multi-threshold techniques have been used to reduce runtime leakage power witho...
Puneet Gupta, Andrew B. Kahng, Puneet Sharma, Denn...