2209 search results - page 9 / 442 » A high performance JPEG2000 architecture |
DAC
2001
ACM
14 years 8 months ago
2001
ACM
This paper presents LOTTERYBUS, a novel high-performance communication architecture for system-on-chip (SoC) designs. The LOTTERYBUS architecture was designed to address the follo...
IPPS
1998
IEEE
13 years 12 months ago
1998
IEEE
Switch-based interconnects are used in a number of application domains including parallel system interconnects, local area networks, and wide area networks. However, very few swit...
BTW
1999
Springer
13 years 12 months ago
1999
Springer
Data mining has been recognised as an essential element of decision support, which has increasingly become a focus of the database industry. Like all computationally expensive data...
CODES
2006
IEEE
14 years 1 months ago
2006
IEEE
In deep sub-micron technology, the crosstalk effect between adjacent wires has become an important issue, especially between long on-chip buses. This effect leads to the increas...
VLSID
2006
IEEE
14 years 8 months ago
2006
IEEE
In this paper we present a high-performance, high throughput, and area efficient architecture for the VLSI implementation of the AES algorithm. The subkeys, required for each round...