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ISCAS
2007
IEEE
111views Hardware» more  ISCAS 2007»
14 years 3 months ago
Integrated Heterogenous Modelling for Power Estimation of Single Processor based Reconfigurable SoC Platform
—Various instruction and transaction based power estimation techniques for processor and on-chip buses have been proposed in the past. In this paper, we propose a heterogeneous p...
Prakash Srinivasan, Ali Ahmadinia, Ahmet T. Erdoga...
DATE
2007
IEEE
133views Hardware» more  DATE 2007»
14 years 3 months ago
Stochastic modeling and optimization for robust power management in a partially observable system
As the hardware and software complexity grows, it is unlikely for the power management hardware/software to have a full observation of the entire system status. In this paper, we ...
Qinru Qiu, Ying Tan, Qing Wu
IPPS
2006
IEEE
14 years 3 months ago
A high level SoC power estimation based on IP modeling
Current electronic system design requires to be concerned with power consumption consideration. However, in a lot of design tools, the application power consumption budget is esti...
David Elléouet, Nathalie Julien, Dominique ...
ISQED
2006
IEEE
106views Hardware» more  ISQED 2006»
14 years 3 months ago
Parameterizable Architecture-Level SRAM Power Model Using Circuit-Simulation Backend for Leakage Calibration
We propose an accurate architecture-level power estimation method for SRAM memories. This hybrid method is composed of an analytical part for dynamic power estimation and a circui...
Minh Quang Do, Mindaugas Drazdziulis, Per Larsson-...
ISLPED
2009
ACM
110views Hardware» more  ISLPED 2009»
14 years 3 months ago
End-to-end validation of architectural power models
While researchers have invested substantial effort to build architectural power models, validating such models has proven difficult at best. In this paper, we examine the accurac...
Madhu Saravana Sibi Govindan, Stephen W. Keckler, ...