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HPCA
2003
IEEE
14 years 9 months ago
Control Techniques to Eliminate Voltage Emergencies in High Performance Processors
Increasing focus on power dissipation issues in current microprocessors has led to a host of proposals for clock gating and other power-saving techniques. While generally effectiv...
Russ Joseph, David Brooks, Margaret Martonosi
DAC
1996
ACM
14 years 22 days ago
Sizing of Clock Distribution Networks for High Performance CPU Chips
: In a high performance microprocessor such as Digital's 300MHz Alpha 21164, the distribution of a high quality clock signal to all regions of the device is achieved using a c...
Madhav P. Desai, Radenko Cvijetic, James Jensen
VLSID
2002
IEEE
114views VLSI» more  VLSID 2002»
14 years 1 months ago
Minimizing Energy Consumption for High-Performance Processing
Power consumption is becoming an increasingly important constraint in the design of microprocessors. This paper examines the use of multiple constrained processors running at lowe...
Eric F. Weglarz, Kewal K. Saluja, Mikko H. Lipasti
DAC
1999
ACM
14 years 27 days ago
Common-Case Computation: A High-Level Technique for Power and Performance Optimization
This paper presents a design methodology, called common-case computation (CCC), and new design automation algorithms for optimizing power consumption or performance. The proposed ...
Ganesh Lakshminarayana, Anand Raghunathan, Kamal S...
TVLSI
2002
79views more  TVLSI 2002»
13 years 8 months ago
Electrical and optical clock distribution networks for gigascale microprocessors
A summary of electrical and optical approaches to clock distribution within high-performance microprocessors is presented. System-level properties of intrachip electrical clock dis...
A. V. Mule, Elias N. Glytsis, Thomas K. Gaylord, J...