44 search results - page 6 / 9 » A reuse scenario for the VHDL-based hardware design flow |
DATE
2008
IEEE
14 years 1 months ago
2008
IEEE
In this paper we propose an embedded software design flow, which starts from an UML model and provides automatic mapping to other models like Simulink or finite-state machines (FS...
VTS
2006
IEEE
2006
IEEE
Combining Linear and Non-Linear Test Vector Compression Using Correlation-Based Rectangular Encoding
14 years 1 months ago
A technique is presented here for improving the compression achieved with any linear decompressor by adding a small non-linear decoder that exploits bit-wise and pattern-wise corr...
DDECS
2007
IEEE
14 years 1 months ago
2007
IEEE
: As scan compression replaces the traditional scan it is important to understand how it works with power. DFT MAX represents one of the two primary scan compression solutions used...
DAC
2006
ACM
14 years 1 months ago
2006
ACM
Architectural decisions for DSP modules are often analyzed using high level C models. Such high-level explorations allow early examination of the algorithms and the architectural ...
ICCD
2003
IEEE
14 years 4 months ago
2003
IEEE
With the circuit density available in today’s ASIC design systems, increased integration is possible creating more complexity in the design of a System on a Chip (SoC). IBM’s ...