359 search results - page 37 / 72 » A section cache system designed for VLIW architectures |
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Schedulability analysis of real-time embedded systems requires worst case timing guarantees of embedded software performance. This involves not only language level program analysi...
ISCA
2010
IEEE
14 years 23 days ago
2010
IEEE
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
MICRO
2003
IEEE
14 years 29 days ago
2003
IEEE
It is widely accepted that the disproportionate scaling of transistor and conventional on-chip interconnect performance presents a major barrier to future high performance systems...
KDD
2005
ACM
14 years 8 months ago
2005
ACM
With an increasing use of data mining tools and techniques, we envision that a Knowledge Discovery and Data Mining System (KDDMS) will have to support and optimize for the followi...
VLSID
2007
IEEE
14 years 8 months ago
2007
IEEE
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...