41 search results - page 6 / 9 » A semi-persistent clustering technique for VLSI circuit plac... |
ICCD
2005
IEEE
14 years 4 months ago
2005
IEEE
Abstract— Noise induced by impedance discontinuities from VLSI packaging is one of the leading challenges facing system level designers in the next decade. The performance of IC ...
DAC
2009
ACM
14 years 9 months ago
2009
ACM
In this paper, we propose an effective algorithm flow to handle largescale mixed-size placement. The basic idea is to use floorplanning to guide the placement of objects at the gl...
GLVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
We develop a novel on-line built-in self-test (BIST) technique for testing FPGAs that has a very high diagnosability even in presence of clustered faults, a fault pattern for whic...
DFT
2003
IEEE
14 years 1 months ago
2003
IEEE
A new methodology for designing logic circuits with partial error masking is described. The key idea is to exploit the asymmetric soft error susceptibility of nodes in a logic cir...
GLVLSI
2006
IEEE
14 years 2 months ago
2006
IEEE
This paper presents a minimum area, low-power driven clustering algorithm for coarse-grained, antifuse-based FPGAs under delay constraints. The algorithm accurately predicts logic...