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DAC
2002
ACM
14 years 9 months ago
A framework for evaluating design tradeoffs in packet processing architectures
We present an analytical method to evaluate embedded network packet processor architectures, and to explore their design space. Our approach is in contrast to those based on simul...
Lothar Thiele, Matthias Gries, Samarjit Chakrabort...
GECCO
2007
Springer
169views Optimization» more  GECCO 2007»
14 years 2 months ago
An evolutionary platform for developing next-generation electronic circuits
In this paper, a new method for evolving simple electronic circuits is discussed, with the aim of improving the reliability and performance of basic circuit blocks. Next-generatio...
James A. Hilder, Andy M. Tyrrell
DATE
2006
IEEE
128views Hardware» more  DATE 2006»
14 years 2 months ago
Efficient link capacity and QoS design for network-on-chip
This paper addresses the allocation of link capacities in the automated design process of a network-on-chip based system. Communication resource costs are minimized under Quality-...
Zvika Guz, Isask'har Walter, Evgeny Bolotin, Israe...
CASES
2004
ACM
14 years 1 months ago
Balancing design options with Sherpa
Application specific processors offer the potential of rapidly designed logic specifically constructed to meet the performance and area demands of the task at hand. Recently, t...
Timothy Sherwood, Mark Oskin, Brad Calder
DAC
2006
ACM
14 years 9 months ago
GreenBus: a generic interconnect fabric for transaction level modelling
In this paper we present a generic interconnect fabric for transaction level modelling tackeling three major aspects. First, a review of the bus and IO structures that we have ana...
Wolfgang Klingauf, Robert Günzel, Oliver Brin...