5 search results - page 1 / 1 » A study of Through-Silicon-Via impact on the 3D stacked IC l... |
ICCAD
2009
IEEE
13 years 8 months ago
2009
IEEE
NANONET
2009
Springer
14 years 3 months ago
2009
Springer
3D stacked chips have become a promising integration technology for modern systems. The complexity reached in multi-processor systems has increased the communication delays between...
DATE
2009
IEEE
14 years 5 months ago
2009
IEEE
Abstract—This work proposes reliability aware through silicon via (TSV) planning for the 3D stacked silicon integrated circuits (ICs). The 3D power distribution network is modele...
SLIP
2009
ACM
14 years 5 months ago
2009
ACM
Individual dies in 3D integrated circuits are connected using throughsilicon-vias (TSVs). TSVs not only increase manufacturing cost, but also incur silicon area, delay, and power ...
GLVLSI
2009
IEEE
13 years 8 months ago
2009
IEEE
Distributing power and ground to a vertically integrated system is a complex and difficult task. Interplane communication and power delivery are achieved by through silicon vias (...