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ICCAD
2005
IEEE
127views Hardware» more  ICCAD 2005»
14 years 7 months ago
Hardware synthesis from guarded atomic actions with performance specifications
We present a new hardware synthesis methodology for guarded atomic actions (or rules), which satisfies performance-related scheduling specifications provided by the designer. The ...
Daniel L. Rosenband
RSP
2005
IEEE
164views Control Systems» more  RSP 2005»
14 years 3 months ago
High Level Synthesis for Data-Driven Applications
Abstract— John von Neumann proposed his famous architecture in a context where hardware was very expensive and bulky. His goal was to maximize functionality with minimal hardware...
Etienne Bergeron, Xavier Saint-Mleux, Marc Feeley,...
ICIP
2002
IEEE
14 years 11 months ago
Benchmarking and hardware implementation of JPEG-LS
The JPEG-LS algorithm is one of the recently designated standards for lossless compression of grayscale and color images. In this paper, simulation results for lossless and near l...
Andreas E. Savakis, Michael D. Piorun
DATE
2008
IEEE
142views Hardware» more  DATE 2008»
14 years 4 months ago
Approximate logic circuits for low overhead, non-intrusive concurrent error detection
This paper describes a scalable, technology-independent algorithm for the synthesis of approximate logic circuits. A low overhead, non-intrusive solution for concurrent error dete...
Mihir R. Choudhury, Kartik Mohanram
ATVA
2007
Springer
111views Hardware» more  ATVA 2007»
14 years 4 months ago
Timed Control with Observation Based and Stuttering Invariant Strategies
In this paper we consider the problem of controller synthesis for timed games under imperfect information. Novel to our approach is the requirements to strategies: they should be b...
Franck Cassez, Alexandre David, Kim Guldstrand Lar...