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» Alternative Test Methods Using IEEE 1149.4
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ISSRE
2003
IEEE
14 years 28 days ago
Test Adequacy Assessment for UML Design Model Testing
Systematic design testing, in which executable models of behaviors are tested using inputs that exercise scenarios, can help reveal flaws in designs before they are implemented i...
Sudipto Ghosh, Robert B. France, Conrad Braganza, ...
DDECS
2007
IEEE
105views Hardware» more  DDECS 2007»
14 years 2 months ago
A Heuristic for Concurrent SOC Test Scheduling with Compression and Sharing
1-The increasing cost for System-on-Chip (SOC) testing is mainly due to the huge test data volumes that lead to long test application time and require large automatic test equipmen...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...
DATE
2006
IEEE
94views Hardware» more  DATE 2006»
14 years 1 months ago
Reuse-based test access and integrated test scheduling for network-on-chip
In this paper, we propose a new method for test access and test scheduling in NoC-based system. It relies on a progressive reuse of the network resources for transporting test dat...
Chunsheng Liu, Zach Link, Dhiraj K. Pradhan
ICALT
2010
IEEE
13 years 8 months ago
Improve the Output from a MCQ Test Item Generator Using Statistical NLP
In this study I use statistical Natural Language Processing and adapted Controlled Language methods to preprocess individual documents before they are used as source documents for ...
Robert Michael Foster
VLSID
2004
IEEE
112views VLSI» more  VLSID 2004»
14 years 8 months ago
Comparison of Effectiveness of Current Ratio and Delta-IDDQ Tests
IDDQ test is a valuable test method for semiconductor manufacturers. However, its effectiveness is reduced for deep sub-micron technology chips due to rising background leakage. C...
Sagar S. Sabade, D. M. H. Walker