2451 search results - page 55 / 491 » Alternative Test Methods Using IEEE 1149.4 |
DATE
2000
IEEE
14 years 4 days ago
2000
IEEE
We describe a method for on-chip generation of weighted test sequences for synchronous sequential circuits. For combinational circuits, three weights, 0, 0.5 and 1, are sufficien...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
In this work a method to improve the loopback test used in RF analog circuits is described. The approach is targeted to the SoC environment, being able to reuse system resources i...
SEW
2006
IEEE
14 years 1 months ago
2006
IEEE
Pseudo-exhaustive testing uses the empirical observation that, for broad classes of software, a fault is likely triggered by only a few variables interacting. The method takes adv...
ICCAD
1994
IEEE
13 years 12 months ago
1994
IEEE
Existing built-in self test (BIST) strategies require the use of specialized test pattern generation hardware which introduces signi cant area overhead and performance degradation...
ICCAD
1998
IEEE
14 years 5 hour ago
1998
IEEE
A method is presented for identifying primitive path-delay faults in non-scan sequential circuits and generating robust tests for all robustly testable primitive faults. It uses t...