21 search results - page 3 / 5 » An Adaptive Supply-Voltage Scheme for Low Power Self-Timed C... |
MICRO
2009
IEEE
14 years 1 months ago
2009
IEEE
Voltage scaling is one of the most effective mechanisms to reduce microprocessor power consumption. However, the increased severity of manufacturing-induced parameter variations a...
GLVLSI
2002
IEEE
13 years 12 months ago
2002
IEEE
We present a low-power sine-output Direct Digital Frequency Synthesizer (DDFS) realized in 0.18 µm CMOS that achieves 60 dBc spectral purity from DC to the Nyquist frequency. No ...
ICCAD
2009
IEEE
13 years 4 months ago
2009
IEEE
SRAM cell design is driven by the need to satisfy static noise margin, write margin and read current margin (RCM) over all cells in the array in an energy-efficient manner. These ...
DAC
2005
ACM
13 years 9 months ago
2005
ACM
This paper proposes a low power technique, called SBR (Sign Bit Reduction) which may reduce the switching activity in multipliers as well as data buses. Utilizing the multipliers ...
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
— The work presented in this paper is about the design of current-controlled oscillators (ICO). Two ICOs are proposed. Aiming at reducing the duration of the short-circuit curren...