710 search results - page 114 / 142 » An Architecture for Exploring Large Design Spaces |
MICRO
2003
IEEE
14 years 29 days ago
2003
IEEE
Application-specific extensions to the computational capabilities of a processor provide an efficient mechanism to meet the growing performance and power demands of embedded appl...
ASAP
2007
IEEE
13 years 9 months ago
2007
IEEE
Interconnect validation is an important early step toward global SoC (System-On-Chip) validation. Fast performances evaluation and design space exploration for NoCs (Networks-On-C...
VLSISP
2011
13 years 2 months ago
2011
This paper presents accurate area, time, power estimation models for implementations using FPGAs from the Xilinx Virtex-2Pro family [1]. These models are designed to facilitate ef...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
Parametric representations used for symbolic simulation of circuits usually use BDDs. After a few steps of symbolic simulation, state set representation is converted from one para...
SIGCOMM
1998
ACM
13 years 12 months ago
1998
ACM
Several recent proposals for an “active networks” architecture advocate the placement of user-defined computation within the network as a key mechanism to enable a wide range...