112 search results - page 6 / 23 » An efficient FIR filter architecture |
TSP
2008
13 years 6 months ago
2008
Multidimensional hourglass filter banks decompose the frequency spectrum of input signals into hourglass-shaped directional subbands, each aligned with one of the frequency axes. T...
ICCD
2008
IEEE
14 years 4 months ago
2008
IEEE
—In this paper, a new FIR digital filter synthesis algorithm is proposed to consider multiple adder graphs for a coefficient. The proposed algorithm selects an adder graph that c...
ISVLSI
2006
IEEE
14 years 1 months ago
2006
IEEE
FPGAs have been used for prototyping of ASICs, for low-volume ASIC replacement and for systems requiring in-field hardware upgrades. However, the potential to use dynamic reconfig...
FPL
2003
Springer
14 years 17 days ago
2003
Springer
Distributed Arithmetic techniques are widely used to implement Sum-of-Products computations such as calculations found in multimedia applications like FIR filtering and Discrete Co...
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
−In this paper, a novel architecture of a fractional-N phase-locked loop (PLL) is presented for digital clock generation. By employing multimodulus dividers in parallel with sequ...