139 search results - page 4 / 28 » An evolutionary algorithm for reducing integrated-circuit te... |
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Recent advances in tester technology have led to automatic test equipment (ATE) that can operate at up to several hundred MHz. However, system-on-chip (SOC) scan chains typically ...
GECCO
2008
Springer
13 years 8 months ago
2008
Springer
This paper deals with the problem of comparing and testing evolutionary algorithms, that is, the benchmarking problem, from an analysis point of view. A practical study of the app...
GECCO
2006
Springer
13 years 11 months ago
2006
Springer
Embedded systems are often used in a safety-critical context, e.g. in airborne or vehicle systems. Typically, timing constraints must be satisfied so that real-time embedded syste...
DAC
2010
ACM
13 years 11 months ago
2010
ACM
As the geometry shrinking faces severe limitations, 3D wafer stacking with through silicon via (TSV) has gained interest for future SOC integration. Since TSV fill material and s...
GLVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
A hierarchical scheme with cells and modules is crucial for managing design complexity during a large integrated circuit design. We present a methodology for thermal aware cell-ba...