115 search results - page 21 / 23 » Analysis and optimization of gate leakage current of power g... |
GLVLSI
2003
IEEE
14 years 1 months ago
2003
IEEE
One of the fundamental problems in Deep Sub Micron (DSM) circuits is Simultaneous Switching Noise (SSN), which causes voltage fluctuations in the circuit power/ground networks. In...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
Power gating is one of the most effective techniques in reducing the standby leakage current of VLSI circuits. In this paper we introduce a new approach for sleep transistor sizin...
FPL
1995
Springer
13 years 11 months ago
1995
Springer
Although the energy required to perform a logic operation has continuously dropped at least by ten orders of magnitude since early vacuumtube electronics [1], the increasing clock ...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Subthreshold circuit designs have been demonstrated to be a successful alternative when ultra-low power consumption is paramount. However, the characteristics of MOS transistors i...
ASPDAC
2009
ACM
14 years 2 months ago
2009
ACM
— Recent advances in statistical timing analysis (SSTA) achieve great success in computing arrival times under variations by extending sum and maximum operations to random variab...