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DAC
2006
ACM
14 years 2 months ago
Modeling and minimization of PMOS NBTI effect for robust nanometer design
Negative bias temperature instability (NBTI) has become the dominant reliability concern for nanoscale PMOS transistors. In this paper, a predictive model is developed for the deg...
Rakesh Vattikonda, Wenping Wang, Yu Cao
GLVLSI
2005
IEEE
118views VLSI» more  GLVLSI 2005»
14 years 1 months ago
High-diagnosability online built-in self-test of FPGAs via iterative bootstrapping
We develop a novel on-line built-in self-test (BIST) technique for testing FPGAs that has a very high diagnosability even in presence of clustered faults, a fault pattern for whic...
Vishal Suthar, Shantanu Dutt
ISCAS
2005
IEEE
144views Hardware» more  ISCAS 2005»
14 years 1 months ago
Cascode buffer for monolithic voltage conversion operating at high input supply voltages
A high-to-low switching DC-DC converter that operates at input supply voltages up to two times as high as the maximum voltage permitted in a nanometer CMOS technology is proposed ...
Volkan Kursun, Gerhard Schrom, Vivek De, Eby G. Fr...
ISLPED
2005
ACM
96views Hardware» more  ISLPED 2005»
14 years 1 months ago
Power-optimal repeater insertion considering Vdd and Vth as design freedoms
This work first presents an analytical repeater insertion method which optimizes power under delay constraint for a single net. This method finds the optimal repeater insertion ...
Yu Ching Chang, King Ho Tam, Lei He
FPGA
2005
ACM
80views FPGA» more  FPGA 2005»
14 years 1 months ago
Simultaneous timing-driven placement and duplication
Logic duplication is an effective method for improving circuit performance. In this paper we present an algorithm named SPD that performs simultaneous placement and duplication to...
Gang Chen, Jason Cong