common use is the distinction into two (abstract) fault models: A new fault modelling scheme for integrated analogue general the "Single Hard Fault Model (SHFM)" and the ...
In this paper, we propose a new technique, referred to as virtual probe (VP), to efficiently measure, characterize and monitor both inter-die and spatially-correlated intra-die va...
ABSTRACT - This paper presents a new design flow, FPDSiMPA, and a set of techniques for synthesizing high-performance sub-half micron logic circuits. FPD-SiMPA consists of logic p...
Abstract— Thermal issues are a primary concern in the threedimensional (3D) integrated circuit (IC) design. Temperature, area, and wire length must be simultaneously optimized du...
Pingqiang Zhou, Yuchun Ma, Zhuoyuan Li, Robert P. ...
A unified approach to fault simulation for FGDs is introduced. Instead of a direct fault simulation, the proposed approach calculates indirectly from the simulator output the set...