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DAC
2004
ACM
14 years 9 months ago
A method for correcting the functionality of a wire-pipelined circuit
As across-chip interconnect delays can exceed a clock cycle, wire pipelining becomes essential in high performance designs. Although it allows higher clock frequencies, it may cha...
Vidyasagar Nookala, Sachin S. Sapatnekar
GLVLSI
2010
IEEE
310views VLSI» more  GLVLSI 2010»
14 years 1 months ago
Graphene tunneling FET and its applications in low-power circuit design
Graphene nanoribbon tunneling FETs (GNR TFETs) are promising devices for post-CMOS low-power applications because of the low subthreshold swing, high Ion/Ioff, and potential for l...
Xuebei Yang, Jyotsna Chauhan, Jing Guo, Kartik Moh...
DAC
2003
ACM
14 years 1 months ago
Model order reduction of nonuniform transmission lines using integrated congruence transform
This paper presents a new algorithm based on Integrated Congruence transform for the analysis of both uniform and nonuniform transmission lines. The key advantage of the proposed ...
Emad Gad, Michel S. Nakhla
ICCAD
2003
IEEE
131views Hardware» more  ICCAD 2003»
14 years 5 months ago
A New Surface Integral Formulation For Wideband Impedance Extraction of 3-D Structures
Detailed electromagnetic analysis of three-dimensional structures in multilayered dielectric media is critical for automatic generation of equivalent circuit models for the interc...
Ben Song, Zhenhai Zhu, John D. Rockway, Jacob Whit...
DATE
2008
IEEE
79views Hardware» more  DATE 2008»
14 years 2 months ago
A Programmable and Low-EMI Integrated Half-Bridge Driver in BCD Technology
This paper presents the design and the laboratory results of an integrated half-bridge driver for power electronic systems in a 0.35 µm Bipolar CMOS DMOS (BCD) technology. The pr...
Francesco D'Ascoli, Luca Bacciarelli, Massimiliano...