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» Architectural Synthesis of Timed Asynchronous Systems
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DAC
1998
ACM
14 years 26 days ago
Synthesis of Power-Optimized and Area-Optimized Circuits from Hierarchical Behavioral Descriptions
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
Ganesh Lakshminarayana, Niraj K. Jha
DAC
1997
ACM
14 years 24 days ago
A Parallel/Serial Trade-Off Methodology for Look-Up Table Based Decoders
A methodology for architecture exploration of look-up table based decoders is presented. For the degree of parallel processing a trade-off can be made by exploring system level an...
Claus Schneider
ICCAD
2010
IEEE
124views Hardware» more  ICCAD 2010»
13 years 6 months ago
Symbolic performance analysis of elastic systems
Elastic systems, either synchronous or asynchronous, can be optimized for the average-case performance when they have units with early evaluation or variable latency. The performan...
Marc Galceran Oms, Jordi Cortadella, Michael Kishi...
CODES
1998
IEEE
14 years 27 days ago
Schedulability analysis of heterogeneous systems for performance message sequence chart
Telecommunication systems are often specified in the standardized languages SDL and MSc. These languages allow only the specification of pure functional aspects. To remedy this pr...
Frank Slomka, Jürgen Zant, Lennard Lambert
NIPS
2003
13 years 10 months ago
A Mixed-Signal VLSI for Real-Time Generation of Edge-Based Image Vectors
A mixed-signal image filtering VLSI has been developed aiming at real-time generation of edge-based image vectors for robust image recognition. A four-stage asynchronous median de...
Masakazu Yagi, Hideo Yamasaki, Tadashi Shibata