110 search results - page 6 / 22 » Architectural simulation for a programmable DSP chip set |
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
Consumer electronics products, such as high-end (digital) TVs, contain complex systems on chip (SOC) that offer high computational performance at low cost. Traditionally, these SO...
DAC
1999
ACM
13 years 11 months ago
1999
ACM
We present our practical experience in the modeling and integration of cycle/phase-accurate instruction set architecture (ISA) models of digital signal processors (DSPs) with othe...
DAC
1996
ACM
13 years 11 months ago
1996
ACM
This paper provides a case study that shows how a demanding application stresses the capabilities of today's CAD tools, especially in the integration of products from multipl...
MICRO
2002
IEEE
14 years 9 days ago
2002
IEEE
Multimedia processing on embedded devices requires an architecture that leads to high performance, low power consumption, reduced design complexity, and small code size. In this p...
TCAD
2010
13 years 2 months ago
2010
Abstract--This paper presents a GALS-compatible circuitswitched on-chip network that is well suited for use in many-core platforms targeting streaming DSP and embedded applications...