218 search results - page 14 / 44 » Architecture Level Power-Performance Tradeoffs for Pipelined... |
DSD
2010
IEEE
13 years 9 months ago
2010
IEEE
—Although many efficient high-level algorithms have been proposed for the realization of Multiple Constant Multiplications (MCM) using the fewest number of addition and subtract...
MICRO
1999
IEEE
14 years 1 months ago
1999
IEEE
Although PC-class 3D graphics hardware has made significant strides in the last several years, the underlying architectural design principles are still generally considered as a b...
DSD
2007
IEEE
14 years 3 months ago
2007
IEEE
Today energy is an important factor in designing a multiprocessor system. The overall goal of this work is to propose a methodology for design space exploration of VLIW multiproce...
DAC
2002
ACM
14 years 10 months ago
2002
ACM
A central problem in functional verification is to check that a circuit block is producing correct outputs while enforcing that the environment is providing legal inputs. To attac...
IFIPPACT
1994
13 years 10 months ago
1994
: Advanced architectural features of microprocessors like instruction level parallelism and pipelined functional hardware units require code generation techniques beyond the scope ...