1381 search results - page 30 / 277 » Architecture and Design of a High Performance SRAM for SOC D... |
IPPS
2005
IEEE
14 years 1 months ago
2005
IEEE
A new high performance computation technique involving multiple processors on a single silicon die is quickly gaining popularity. This new design approach provides very high perfo...
IPPS
2006
IEEE
14 years 2 months ago
2006
IEEE
The designs of high-performance processor architectures are moving toward the integration of a large number of multiple processing cores on a single chip. The IBM Cyclops-64 (C64)...
VLSID
2004
IEEE
14 years 8 months ago
2004
IEEE
With shrinking noise margins and increasing numbers of on-chip noise sources, power grid design has become a critical performance determinant. This paper presents an overview of r...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
Applications from the embedded consumer domain put challenging requirements on SoC infrastructures, i.e. interconnect and memory. Specifically, video applications demand large sto...
DATE
2006
IEEE
14 years 2 months ago
2006
IEEE
The ever increasing usage of microprocessor devices is sustained by a high volume production that in turn requires a high production yield, backed by a controlled process. Fault d...