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ISLPED
2005
ACM
72views Hardware» more  ISLPED 2005»
14 years 3 months ago
A low power current steering digital to analog converter in 0.18 Micron CMOS
This paper discusses a number of circuit techniques which address the DC and AC distortion performance of a low power current steering Digital-to-Analog Converter design. The desi...
Douglas Mercer
ISLPED
1995
ACM
113views Hardware» more  ISLPED 1995»
14 years 1 months ago
Low delay-power product CMOS design using one-hot residue coding
: CMOS implementations of arithmetic units for One-Hot Residue encoded operands are presented. They are shown to reduce the delay-power product of conventional, fully-encoded desig...
William A. Chren Jr.
ISCAS
2005
IEEE
121views Hardware» more  ISCAS 2005»
14 years 3 months ago
A low-power high-SFDR CMOS direct digital frequency synthesizer
—A low-power high-SFDR CMOS direct digital frequency synthesizer (DDFS) is presented. Several design techniques, including a cell-based lookup table, a power aware parameters sel...
Jinn-Shyan Wang, Shiang-Jiun Lin, Chingwei Yeh
DAC
1996
ACM
14 years 1 months ago
Design Considerations and Tools for Low-voltage Digital System Design
Aggressive voltage scaling to 1V and below through technology, circuit, and architecture optimization has been proven to be the key to ultra low-power design. The key technology t...
Anantha Chandrakasan, Isabel Yang, Carlin Vieri, D...
DATE
2005
IEEE
110views Hardware» more  DATE 2005»
14 years 3 months ago
Designer-Driven Topology Optimization for Pipelined Analog to Digital Converters
This paper suggests a practical “hybrid” synthesis methodology which integrates designer-derived analytical models for system-level description with simulation-based models at...
Yu-Tsun Chien, Dong Chen, Jea-Hong Lou, Gin-Kou Ma...