436 search results - page 28 / 88 » Benchmarking and hardware implementation of JPEG-LS |
DATE
2000
IEEE
14 years 2 months ago
2000
IEEE
In this paper we address the problem of designing very high throughput finite state machines (FSMs). The presence of loops in sequential circuits prevents a straightforward and g...
ASPDAC
2000
ACM
14 years 2 months ago
2000
ACM
— Given the recent wave of innovation and diversification in digital signal processor (DSP) architecture, the need for quickly evaluating the true potential of considered archite...
ISLPED
1999
ACM
14 years 1 months ago
1999
ACM
The charge recovery databus is a scheme which reduces energy consumption through the application of adiabatic circuit techniques. Previous work 2 gives a solid theoretical analysi...
ICCAD
1998
IEEE
14 years 1 months ago
1998
IEEE
A method is presented for identifying primitive path-delay faults in non-scan sequential circuits and generating robust tests for all robustly testable primitive faults. It uses t...
ISLPED
1998
ACM
14 years 1 months ago
1998
ACM
- The objective of this paper is to provide lower and upper bounds for the switching activity on the state lines in Finite State Machines (FSMs). Using a Markov chain model for the...