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ISLPED
1999
ACM
84views Hardware» more  ISLPED 1999»
13 years 11 months ago
An architectural solution for the inductive noise problem due to clock-gating
As we approach Gigascale Integration, chip power consumption is becoming a critical system parameter. Clock-gating idle units provides needed reductions in power consumption. Howe...
Mondira Deb Pant, Pankaj Pant, D. Scott Wills, Viv...
ISCAS
1999
IEEE
100views Hardware» more  ISCAS 1999»
13 years 11 months ago
Reduced complexity, high performance digital delta-sigma modulator for fractional-N frequency synthesis
This paper presents the design consideration of high order digital AZ modulators used as modulus controller for fractional-N frequency synthesizer. A third-order MASH structure (M...
Lizhong Sun, Thierry Lepley, Franck Nozahic, Amaud...
IPPS
1998
IEEE
13 years 11 months ago
Multiprocessor Architectures Using Multi-Hop Multi-OPS Lightwave Networks and Distributed Control
Advances in optical technology have increased the interest for multiprocessor architectures based on lightwave networks because of the vast bandwidth available. In this paper we p...
David Coudert, Afonso Ferreira, Xavier Muño...
ICNP
1997
IEEE
13 years 11 months ago
On-line Dynamic Bandwidth Allocation
Network multimedia applications require certain performance guarantees that can be provided through proper resource allocation. Allocation techniques are needed to provide these g...
Errin W. Fulp, Douglas S. Reeves
DAC
2010
ACM
13 years 11 months ago
Theoretical analysis of gate level information flow tracking
Understanding the flow of information is an important aspect in computer security. There has been a recent move towards tracking information in hardware and understanding the flow...
Jason Oberg, Wei Hu, Ali Irturk, Mohit Tiwari, Tim...