Sciweavers
Explore
Publications
Books
Software
Tutorials
Presentations
Lectures Notes
Datasets
Labs
Conferences
Community
Upcoming
Conferences
Top Ranked Papers
Most Viewed Conferences
Conferences by Acronym
Conferences by Subject
Conferences by Year
Tools
Sci2ools
International Keyboard
Graphical Social Symbols
CSS3 Style Generator
OCR
Web Page to Image
Web Page to PDF
Merge PDF
Split PDF
Latex Equation Editor
Extract Images from PDF
Convert JPEG to PS
Convert Latex to Word
Convert Word to PDF
Image Converter
PDF Converter
Community
Sciweavers
About
Terms of Use
Privacy Policy
Cookies
4809
search results - page 1 / 962
»
CajunBot: Architecture and algorithms
Sort
relevance
views
votes
recent
update
View
thumb
title
24
click to vote
JFR
2006
59
views
more
JFR 2006
»
CajunBot: Architecture and algorithms
13 years 11 months ago
Download
www.cajunbot.com
Arun Lakhotia, Suresh Golconda, Anthony Maida, Pab...
claim paper
Read More »
23
click to vote
DAC
1999
ACM
140
views
Computer Architecture
»
more
DAC 1999
»
An Approach for Extracting RT Timing Information to Annotate Algorithmic VHDL Specifications
14 years 3 months ago
Download
www.cecs.uci.edu
Cordula Hansen, Francisco Nascimento, Wolfgang Ros...
claim paper
Read More »
21
click to vote
DAC
1999
ACM
94
views
Computer Architecture
»
more
DAC 1999
»
Efficient Algorithms for Optimum Cycle Mean and Optimum Cost to Time Ratio Problems
14 years 3 months ago
Download
www.cecs.uci.edu
Ali Dasdan, Sandy Irani, Rajesh K. Gupta
claim paper
Read More »
28
click to vote
DAC
2001
ACM
125
views
Computer Architecture
»
more
DAC 2001
»
A New Structural Pattern Matching Algorithm for Technology Mapping
14 years 12 months ago
Download
www.ece.umn.edu
Min Zhao, Sachin S. Sapatnekar
claim paper
Read More »
28
click to vote
VLSID
2006
IEEE
144
views
VLSI
»
more
VLSID 2006
»
A High-Performance VLSI Architecture for Advanced Encryption Standard (AES) Algorithm
14 years 11 months ago
Download
www.cse.unt.edu
In this paper we present a high-performance, high throughput, and area efficient architecture for the VLSI implementation of the AES algorithm. The subkeys, required for each round...
Naga M. Kosaraju, Murali R. Varanasi, Saraju P. Mo...
claim paper
Read More »
« Prev
« First
page 1 / 962
Last »
Next »