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CDES
2006
100views Hardware» more  CDES 2006»
13 years 8 months ago
Integrity and Integration Issues for Nano-Tube Based Interconnect Systems
: As we continue miniaturization of circuits into nano-scale, interconnects have been recognized as the limiting factor for next generation of computing structures. To increase the...
Tulin Mangir
SLIP
2009
ACM
14 years 1 months ago
Closed-form solution for timing analysis of process variations on SWCNT interconnect
In this paper, a comprehensive and fast method is presented for the timing analysis of process variations on single-walled carbon nanotube (SWCNT) bundles. Unlike previous works t...
Peng Sun, Rong Luo
FDL
2008
IEEE
14 years 1 months ago
VHDL-AMS Implementation of a Numerical Ballistic CNT Model for Logic Circuit Simulation
—This paper introduces a novel numerical carbon nanotube transistor (CNT) modelling approach which brings in a flexible and efficient cubic spline non-linear approximation of t...
Dafeng Zhou, Tom J. Kazmierski, Bashir M. Al-Hashi...
DAC
2006
ACM
14 years 8 months ago
NATURE: a hybrid nanotube/CMOS dynamically reconfigurable architecture
Recent progress on nanodevices, such as carbon nanotubes and nanowires, points to promising directions for future circuit design. However, nanofabrication techniques are not yet m...
Wei Zhang, Niraj K. Jha, Li Shang
ICCD
2006
IEEE
148views Hardware» more  ICCD 2006»
14 years 4 months ago
Trends and Future Directions in Nano Structure Based Computing and Fabrication
— As silicon CMOS devices are scaled down into the nanoscale regime, new challenges at both the device and system level are arising. While some of these challenges will be overco...
R. Iris Bahar