170 search results - page 4 / 34 » Challenges in Embedded Memory Design and Test |
ASPDAC
2007
ACM
14 years 16 days ago
2007
ACM
The memory subsystem is a major contributor to the performance, power, and area of complex SoCs used in feature rich multimedia products. Hence, memory architecture of the embedded...
ISCAS
2006
IEEE
14 years 2 months ago
2006
IEEE
Abstract— There is a clear trend of future embedded systems in moving toward wireless, multimedia, multi-functional and ubiquitous applications. This emerges new challenges in th...
DAC
2002
ACM
14 years 9 months ago
2002
ACM
One of the primary challenges in embedded system design is designing the memory hierarchy and restructuring the application to take advantage of it. This task is particularly impo...
DDECS
2007
IEEE
14 years 2 months ago
2007
IEEE
: As scan compression replaces the traditional scan it is important to understand how it works with power. DFT MAX represents one of the two primary scan compression solutions used...
EIT
2009
IEEE
14 years 3 months ago
2009
IEEE
—System-level design (SLD) provides a solution to the challenge of increasing design complexity and time-to-market pressure in modern embedded system designs. In this paper, we p...