System-level design methodologies for embedded HW/SW systems face several challenges: In order to be susceptible to systematic formal analysis based on state-space exploration, a ...
This paper explores an inferential system for recognizing visual patterns. The system is inspired by a recent memoryprediction theory and models the high-level architecture of the...
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
This paper presents a fault tolerant design technique for the clockless wave pipeline. The specific architectural model investigated in this paper is the two-phase clockless asyn...
T. Feng, Byoungjae Jin, J. Wang, Nohpill Park, Yon...
Power will be the key limiter to system scalability as interconnection networks take up an increasingly significant portion of system power. In this paper, we propose an architec...