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ISCAS
2007
IEEE
144views Hardware» more  ISCAS 2007»
14 years 2 months ago
Multiple-Width Bus Partitioning Approach to Datapath Synthesis
—A shared bus is a suitable structure for minimizing the interconnections costs in system synthesis. It has also been shown that the word-length of Functional Units has a great i...
Arash Ahmadi, Mark Zwolinski
ICCAD
1998
IEEE
122views Hardware» more  ICCAD 1998»
14 years 2 days ago
Dynamic fault collapsing and diagnostic test pattern generation for sequential circuits
In this paper, we present results for significantly improving the performance of sequential circuit diagnostic test pattern generation (DATPG). Our improvements are achieved by de...
Vamsi Boppana, W. Kent Fuchs
VTS
2005
IEEE
89views Hardware» more  VTS 2005»
14 years 1 months ago
Synthesis of Low Power CED Circuits Based on Parity Codes
An automated design procedure is described for synthesizing circuits with low power concurrent error detection. It is based on pre-synthesis selection of a parity-check code follo...
Shalini Ghosh, Sugato Basu, Nur A. Touba
ICCAD
2000
IEEE
88views Hardware» more  ICCAD 2000»
14 years 6 days ago
DRAGON2000: Standard-Cell Placement Tool for Large Industry Circuits
In this paper, we develop a new standard cell placement tool, Dragon2000, to solve large scale placement problem effectively. A top-down hierarchical approach is used in Dragon200...
Maogang Wang, Xiaojian Yang, Majid Sarrafzadeh
DAC
2007
ACM
14 years 8 months ago
Voltage-Frequency Island Partitioning for GALS-based Networks-on-Chip
Due to high levels of integration and complexity, the design of multi-core SoCs has become increasingly challenging. In particular, energy consumption and distributing a single gl...
Ümit Y. Ogras, Diana Marculescu, Puru Choudha...