Sciweavers

1327 search results - page 35 / 266
» Citing for high impact
Sort
View
HPCA
2006
IEEE
14 years 10 months ago
Reducing resource redundancy for concurrent error detection techniques in high performance microprocessors
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...
Sumeet Kumar, Aneesh Aggarwal
HICSS
2012
IEEE
260views Biometrics» more  HICSS 2012»
12 years 5 months ago
Effort Estimates for Vulnerability Discovery Projects
Security vulnerabilities continue to be an issue in the software field and new severe vulnerabilities are discovered in software products each month. This paper analyzes estimates...
Teodor Sommestad, Hannes Holm, Mathias Ekstedt
ISQED
2010
IEEE
141views Hardware» more  ISQED 2010»
14 years 4 months ago
Assessing chip-level impact of double patterning lithography
—Double patterning lithography (DPL) provides an attractive alternative or a supplementary method to enable the 32nm and 22nm process nodes, relative to costlier technology optio...
Kwangok Jeong, Andrew B. Kahng, Rasit Onur Topalog...
ISQED
2006
IEEE
89views Hardware» more  ISQED 2006»
14 years 3 months ago
Study of Floating Fill Impact on Interconnect Capacitance
It is well known that fill insertion adversely affects total and coupling capacitance of interconnects. While grounded fill can be extracted by full-chip extractors, floating ...
Andrew B. Kahng, Kambiz Samadi, Puneet Sharma
VEE
2006
ACM
178views Virtualization» more  VEE 2006»
14 years 3 months ago
Impact of virtual execution environments on processor energy consumption and hardware adaptation
During recent years, microprocessor energy consumption has been surging and efforts to reduce power and energy have received a lot of attention. At the same time, virtual executio...
Shiwen Hu, Lizy Kurian John